Built-in Self Tests (BIST)

Overview

A number of self tests are implemented in the recording system to debug combinations of subsystems.

IMPORTANT

Shift Register Error

A critical resource for programming the settings is broken. Depending upon how badly damaged the probe is, it might "run," but you have no way of knowing which electrodes are connected or which references are being used.

Parallel Serial Bus Error

This most commonly occurs when the probe flex is not seated well in the headstage. It will usually clear if you carefully close the clasp on the ZIF while pushing the flex squarely and firmly into the ZIF all the way.

Signal Path Error / Noise Level Error

These two BISTs are somewhat qualitative and oversensitive. If the only thing wrong is that one or both of these two tests fails, the probe may well be fine...

Try running the probe in air if your lab isn't too noisy. If you need to, run in saline with external referencing selected and connected to the bath. Look at the traces. Is the noise level within expectation? Are the traces fairly homogeneous? The RMS value for the selected graph can be read off in the bottom of the Graphs window; 8 uV or lower is typical.

Open the Graph window's online Shank Viewer. Colorize for AP or LFP. Does the probe activity look fairly uniform? These are reliable indicators that the probe is working.

Bad Channels

It is common that three or four channels on the probe have overly large noise or variation in amplitude. If a few channels look bad but the other channels look normal, then use the probe, but list its bad channels as such in the Each probe table on the IM Setup tab. This will mask them from use in CAR within SpikeGLX, CatGT and Jennifer Colonell's ecephys pipeline.

Headstage Testing

Bad headstages are exceedingly rare. If you are getting errors like:

Error 44 'NO_LINK: No headstage detected on port X'

It is probably a poor connection between the probe flex and headstage. Keep playing with that. Sometimes changing the pairing between probe and headstage will help because the tiny ZIF connectors are not manufactured to super tight tolerances and sometimes the ZIF clasp can weaken and fail to close tightly onto the flex.

The next thing to suspect is a bad 5-meter cable. Sometimes the leads can wiggle loose inside the Omnetics connectors after many dis/connect cycles.

In any case, it is very unlikely that the headstage has an electronic issue. There is little reason to try the headstage tester dongle, which, by the way, is not supported in the latest imec firmware, hence, not supported in the current SpikeGLX-phase30.

Terminology:
    HW     = hardware
    SW     = software
    PC     = computer
    FPGA   = microcomputer
    I2C    = inter-IC bus
    BS     = base station card
    BSC    = base station connect card
    HS     = headstage
    PSB    = parallel serial bus
    POR    = power-on reset
    PRBS   = pseudo random binary signal
    SerDes = serializer/deserializer

Base Station

This test checks the connectivity between PC and BS FPGA board over the PXIe interface.

Heartbeat

The heartbeat signal generated by the PSB_SYNC signal of the probe is routed via the SerDes to the BSC FPGA. The BSC analyzes the presence of a 1 Hz clock signal.

The presence of a heartbeat signal indicates the functionality of the power supplies on the HS for serializer and probe, the POR signal, the presence of the master clock signal on the probe, the functionality of the clock divider on the probe, and basic communication over the SerDes link.

SerDes Link

The functionality of the SerDes link is quantitatively verified using the integrated PRBS test of the SerDes component pair.

I2C/Memmap

This test verifies the functionality of the I2C interface and the probe's memory map. The function reads a register on a memory map address, writes back a modified value, reads this again, and writes the original value again to restore the probe to its settings before test.

The test is successful if the modified value can be read back, and if an ‘Ack’ byte has been received for each R/W operation.

EEPROM

The test verifies the correct access to the EEPROM on flex, HS and BSC. The function writes data to an unused location on the EEPROM, and reads it back.

The test is successful if the data can be read back, and if a ‘Ack’ byte has been received for each R/W operation.

The function tests the flex, HS and BSC EEPROM consecutively. The function returns an error after the first failed test.

Shift Registers

This test verifies the functionality of the shank and base shift registers (SR_CHAIN 1 to 3). The function configures the shift register two times with the same code. After the 2nd write cycle the SR_OUT_OK bit in the STATUS register is read. If OK, the shift register configuration was successful. The test is done for all 3 registers. The configuration code used for the test is a dedicated code (to make sure the bits are not all 0 or 1).

If this test fails, the shank is likely broken.

Parallel Serial Bus

A test mode is implemented on the probe which enables the transmission of a known data pattern over the PSB bus. This test records a small data set and verifies whether that matches the known data pattern.

This way the PSB bus on the probe and all data lines between probe and serializer are verified.

Signal Path

The probe is configured for recording of a test signal which is generated on the HS. This configuration is done via the shank and base configuration registers and the memory map. The AP data signal is recorded and the frequency and amplitude of the recorded signal are extracted for each electrode. If at least 90% of the electrodes show a signal within the frequency and amplitude tolerance, the function returns a pass value.

1. The function requires more than 30 seconds to complete.

2. This test and the noise test are somewhat qualitative. If all other tests besides {signal, noise} pass, the probe is probably alright.

Noise Level

The probe is configured for noise analysis. Via the shank and base configuration registers and the memory map, the electrode inputs are shorted to ground. The data signal is recorded and the noise level is calculated. The function analyses if the probe performance falls inside a specified tolerance range (go/no-go test).

The probe passes the noise test if fewer than 20% of the electrodes have their AP noise value out of spec, and if fewer than 20% of the electrodes have their LFP noise value out of spec.

The function returns a pass/fail value.

1. The function requires more than 30 seconds to complete.

2. This test and the signal path test are somewhat qualitative. If all other tests besides {signal, noise} pass, the probe is probably alright.

fin